The field of the present invention pertains to semiconductor fabrication processing. More particularly, the present invention relates to the field of endpoint detection during chemical mechanical polishing of semiconductor wafers.
Most of the power and usefulness of today""s digital integrated circuit (IC) devices can be attributed to the increasing levels of integration. More and more components (resistors, diodes, transistors, and the like) are continually being integrated into the underlying chip, or IC. The starting material for typical ICs is very high purity silicon. The material is grown as a single crystal and takes the shape of a solid cylinder. This crystal is then sawed (like a loaf of bread) to produce wafers typically 10 to 30 cm in diameter and 250 microns thick.
The geometry of the features of the IC components are commonly defined photographically through a process known as photolithography. Very fine surface geometries can be reproduced accurately by this technique. The photolithography process is used to define component regions and build up components one layer on top of another. Complex ICs can often have many different built up layers, each layer having components, each layer having differing interconnections, and each layer stacked on top of the previous layer. The resulting topography of these complex IC""s often resemble familiar terrestrial xe2x80x9cmountain ranges,xe2x80x9d with many xe2x80x9chillsxe2x80x9d and xe2x80x9cvalleysxe2x80x9d as the IC components are built up on the underlying surface of the silicon wafer.
In the photolithography process, a mask image, or pattern, defining the various components, is focused onto a photosensitive layer using incident light. The image is focused onto the surface using the optical means of the photolithography tool, and is imprinted into the photosensitive layer. To build ever smaller features, increasingly fine images must be focused onto the surface of the photosensitive layer, i.e. optical resolution must increase. As optical resolution increases, the depth of focus of the mask image correspondingly narrows. This is due to the narrow range in depth of focus imposed by the high numerical aperture lenses in the photolithography tool. This narrowing depth of focus is often the limiting factor in the degree of resolution obtainable, and thus, the smallest components obtainable using the photolithography tool. The extreme topography of complex ICs, the xe2x80x9chillsxe2x80x9d and xe2x80x9cvalleys,xe2x80x9d exaggerate the effects of decreasing depth of focus. Thus, in order to properly focus the mask image defining sub-micron geometries onto the photosensitive layer, a precisely flat surface is desired. The precisely flat (i.e., fully planarized) surface will allow for extremely small depths of focus, and in turn, allow the definition and subsequent fabrication of extremely small components.
Chemical mechanical polishing (CMP) is a preferred method of obtaining full planarization of a semiconductor wafer. It involves removing a sacrificial layer of dielectric material using mechanical contact between the wafer and a moving polishing pad saturated with slurry. Polishing flattens out height differences, since high areas of topography (hills) are removed faster than areas of low topography (valleys). Polishing is the only technique with the capability of smoothing out topography over millimeter scale planarization distances leading to maximum angles of much less than one degree after polishing.
FIG. 1 is a top view of a chemical mechanical polishing (CMP) machine 100 and FIG. 2 is a side view of CMP machine 100. CMP machine 100 is fed semiconductor wafers to be polished. CMP machine 100 picks up the wafers with an arm 101 and places them onto a rotating polishing pad 102. Polishing pad 102 is made of a resilient material and is textured, often with a plurality of predetermined grooves 103, to aid the polishing process. Polishing pad 102 rotates on a platen 104, or turn table located beneath polishing pad 102, at a predetermined speed. A wafer 105 is held in place on polishing pad 102 within a carrier ring 112 that is connected to a carrier film 106 of arm 101. The front surface of wafer 105 rests against polishing pad 102. The back surface of wafer 105 is against the lower surface of carrier film 106 of arm 101. As polishing pad 102 rotates, arm 101 rotates wafer 105 at a predetermined rate. Arm 101 forces wafer 105 into polishing pad 102 with a predetermined amount of down force. CMP machine 100 also includes a slurry dispense arm 107 extending across the radius of polishing pad 102, which dispenses a flow of slurry onto polishing pad 102.
The slurry is a mixture of deionized water and polishing agents designed to chemically aid the smooth and predictable planarization of wafer 105. The rotating action of both polishing pad 102 and wafer 105, in conjunction with the polishing action of the slurry, combine to planarize, or polish, wafer 105 at some nominal rate. This rate is referred to as the removal rate. A constant and predictable removal rate is important to the uniformity and throughput performance of the wafer fabrication process. The removal rate should be expedient, yet yield precisely planarized wafers, free from surface anomalies. If the removal rate is too slow, the number of planarized wafers produced in a given period of time decreases, hurting wafer throughput of the fabrication process. If the removal rate is too fast, the CMP planarization process will not be consistent across several wafers in a batch, thereby hurting the consistency of the fabrication process.
To aid in maintaining a stable removal rate, CMP machine 100 includes a conditioner assembly 120. Conditioner assembly 120 includes a conditioner arm 108, which extends across the radius of polishing pad 102. An end effector 109 is connected to conditioner arm 108. End effector 109 includes an abrasive conditioning disk 110 which is used to roughen the surface of polishing pad 102. Conditioning disk 110 is rotated by conditioner arm 108 and is translationally moved towards the center of the polishing pad 102 and away from the center of polishing pad 102, such that conditioning disk 110 covers the radius of polishing pad 102. In so doing, conditioning disk 110 covers the surface area of polishing pad 102, as polishing pad 102 rotates. A polishing pad having a roughened surface has an increased number of micro-pits and gouges in its surface from conditioner assembly 120 and therefore produces a faster removal rate via increased slurry transfer to the surface of wafer 105. Without conditioning, the surface of polishing pad 102 is smoothed during the polishing process and removal rate decreases dramatically. Conditioner assembly 120 re-roughens the surface of polishing pad 102, thereby improving the transport of slurry and improving the removal rate.
As described above, the CMP process uses an abrasive slurry on a polishing pad. The polishing action of the slurry is comprised of an abrasive frictional component and a chemical component. The abrasive frictional component is due to the friction between the surface of the polishing pad, the surface of the wafer, and abrasive particles suspended in the slurry. The chemical component is due to the presence in the slurry of polishing agents which chemically interact with the material of the dielectric layer of wafer 105. The chemical component of the slurry is used to soften the surface of the dielectric layer to be polished, while the frictional component removes material from the surface of wafer 105.
Referring still to FIGS. 1 and 2, the polishing action of the slurry determines the removal rate and removal rate uniformity, and thus, the effectiveness of the CMP process. As slurry is xe2x80x9cconsumedxe2x80x9d in the polishing process, the transport of fresh slurry to the surface of wafer 105 and the removal of polishing by-products away from the surface of wafer 105 becomes very important in maintaining the removal rate. Slurry transport is facilitated by the texture of the surface of polishing pad 102. This texture is comprised of both predefined grooves 103 and micro-pits that are manufactured into the surface of polishing pad 102 and the inherently rough surface of the material from which polishing pad 102 is made.
The slurry is transported by grooves 103 and micro-pits of polishing pad 102 under the edges of wafer 105 as both polishing pad 102 and wafer 105 rotate. Consumed slurry and polishing by-products, in a similar manner, are also transported by grooves 103 and micro-pits of polishing pad 102 away from the surface of wafer 105. As the polishing process continues, fresh slurry is continually dispensed onto polishing pad 102 from slurry dispense arm 107. The polishing process continues until wafer 105 is sufficiently planarized and removed from polishing pad 102.
There are several conventional prior art techniques to determine when to remove wafer 105 from polishing pad 102 of CMP machine 100. One such technique is referred to as endpoint detection, which is a way of determining when to stop the CMP process of a semiconductor wafer. One type of prior art endpoint detection technique, which is well known by those of ordinary skill in the art, involves using reflected incident light to determine the thickness of a film (e.g., oxide) on wafer 105 during the CMP process. Once the film achieves a desired thickness, the CMP process is discontinued.
Specifically, this prior art endpoint detection technique typically includes a transparent window slit 114 of FIG. 1 that is located within polishing pad 102 and enables incident light to pass through it. Furthermore, window slit 114 is positioned within polishing pad 102 such that wafer 105 passes over it every time polishing pad 102 makes a complete rotation. In other words, every time polishing pad 102 rotates during the CMP process, window slit 114 passes underneath wafer 105. As wafer 105 passes over window slit 114, incident light shines through window slit 114 and reflects off of different surfaces within wafer 105. As such, a single wavelength or different wavelengths of reflected incident light are then used to determine the thickness of a film on wafer 105 during the CMP process. As mentioned above, once the film achieves a desired thickness, the CMP process of wafer 105 is discontinued.
There are disadvantages associated with the prior art endpoint detection technique described above. One of the main disadvantages is that it does not provide accurate endpoint detection during a CMP process of semiconductor wafers. One of the factors that causes the prior art light reflection endpoint detection technique to be inaccurate is referred to as xe2x80x9cpattern density effects.xe2x80x9d For example, FIG. 3 shows incident light rays 302-308 reflecting off of different surfaces within a side sectional view of semiconductor wafer 105. Since incident light rays 302-308 each reflect off of different surfaces at different depths within wafer 105, a subsequent film thickness determination of any particular layer using reflected incident light rays 302-308 is difficult. This is referred to as pattern density effects. As such, determining when the desired endpoint has been reached during the CMP process of wafer 105 becomes more difficult and therefore results in less control of the film removal process.
Another factor that causes the prior art light reflection endpoint detection technique to provide inaccurate endpoint detection during a CMP process of semiconductor wafers is that it is difficult to precisely align window slit 114 of FIG. 1 with a particular desirable region of semiconductor wafer 105. One of the reasons for this difficulty is that polishing pad 102 is rotating at the same time arm 101 rotates wafer 105 at a predetermined rate. As a result of this alignment difficulty, the reflected incident light rays 302-308 of FIG. 3 also represent what would be typically received from wafer 105 during a film thickness determination of any particular layer. As such, the received reflected incident light rays 302-308 make it difficult to determine the film thickness of any particular layer thereby reducing the accuracy at which the desired endpoint can be detected. Therefore, the prior art endpoint detection technique described above is undesirable because it does not provide accurate endpoint detection during a CMP process of semiconductor wafers.
Accordingly, a need exists for a method and system that provides more accurate endpoint detection during a CMP process of semiconductor wafers.
The present invention provides a method and system that provides more accurate endpoint detection during a chemical mechanical polishing (CMP) process of semiconductor wafers. As a result of the present invention, an operator of a CMP machine knows precisely when to stop a CMP process of a semiconductor wafer. Furthermore, the present invention enables the operator of the CMP machine to know within a certain accuracy the film (e.g., dielectric layer) thickness remaining after the CMP process of the semiconductor wafer. Moreover, the present invention essentially eliminates excessive chemical mechanical polishing of the semiconductor wafer. As such, not as much dielectric material needs to be deposited on the wafer in order to compensate for excessive chemical mechanical polishing of the semiconductor wafer. Therefore, the present invention is able to reduce fabrication costs of semiconductor wafers.
Specifically, one embodiment of the present invention includes a method for improving chemical mechanical polishing endpoint detection. The method comprises the step of depositing a dielectric layer over a reflectance stop layer. The reflectance stop layer is disposed above a component that is disposed on a semiconductor wafer. During a determination of the thickness of the dielectric layer using a reflected signal of light, the reflectance stop layer substantially reduces any light from reflecting off of the component.
Another embodiment of the present invention also includes a method for improving chemical mechanical polishing endpoint detection. The method comprises the step of depositing a reflectance stop layer above a component that is disposed on a semiconductor wafer. The reflectance stop layer substantially reduces any light from reflecting off of the component. The method also includes the step of depositing a dielectric layer over the reflectance stop layer and the component. Another step of the method includes removing material from the dielectric layer disposed above the semiconductor wafer using a chemical mechanical polishing process. Moreover, the method further includes the step of determining the thickness of the dielectric layer disposed above the semiconductor wafer using a reflected signal of light. In response to the dielectric layer substantially achieving a desired thickness, the method includes the step of stopping the chemical mechanical polishing process of the semiconductor wafer.
In still another embodiment, the present invention comprises the step of depositing a first dielectric layer above a reflectance stop layer. The reflectance stop layer is disposed above a second dielectric layer. The second dielectric layer is disposed over a component that is disposed on a semiconductor wafer. During a determination of the thickness of said second dielectric layer above said component using a reflected signal of light, the reflectance stop layer substantially reduces any light from reflecting off of other surfaces except said component.
Another embodiment of the present invention comprises the step of depositing a first dielectric layer over a component disposed on a semiconductor wafer. The method includes the step of depositing a reflectance stop layer above the first dielectric layer. Furthermore, the method includes the step of depositing a second dielectric layer above the reflectance stop layer. Another step of the method includes removing material from the second dielectric layer and the reflectance stop layer disposed above the semiconductor wafer using a chemical mechanical polishing process. The second dielectric layer and the reflectance stop layer subsequently are substantially removed from above the component. Moreover, the method further includes the step of determining the thickness of the first dielectric layer above the component using a reflected signal of light. The reflectance stop layer that remains substantially reduces any light from reflecting off of other surfaces except the component. In response to the first dielectric layer substantially achieving a desired thickness above the component, the method includes the step of stopping the chemical mechanical polishing process of the semiconductor wafer.
These and other advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the drawing figures.